Certain embodiments of the present invention relate to the processing of multi-channel television signals. More specifically, certain embodiments relate to a method and apparatus for performing sampling rate conversion on digitally decoded BTSC (Broadcast Television System Committee) audio signals.
During the 1980's, the FCC adopted the BTSC format as a standard for multi-channel television sound (MTS). Typically, the BTSC format is used with a composite TV signal that includes a video signal as well as the BTSC format for the sound reproduction.
The BTSC format is similar to FM stereo but has the ability to carry two additional audio channels. Left plus right (L+R) channel mono information is transmitted in a way similar to stereo FM in order to ensure compatibility with monaural television receivers. A 15.734 KHz pilot signal is used, instead of the FM stereo 19 KHz pilot signal, which allows the pilot signal to be phase-locked to the horizontal line frequency. A double sideband-suppressed carrier at twice the frequency of the pilot transmits the left minus right (L−R) stereo information. The stereo information is DBX encoded to aid in noise reduction. An SAP channel is located at 5 times the pilot frequency. The SAP channel may be used for second language or independent source program material. A professional audio channel may be added at 6.5 times the pilot frequency in order to accommodate additional voice or data.
Stereo tuners and demodulator units capable of decoding the BTSC format have been on the market for some time. The front end of the units typically includes analog components or integrated circuit chips. Traditionally, BTSC decoding has been done in the analog domain requiring larger, more expensive implementations that consume a significant amount of power. Previous digital implementations may not be optimized, requiring many clock cycles to perform various processing functions.
It is desirable to perform BTSC decoding in the digital domain on a block of an ASIC chip such that the implementation is optimized for reduced complexity and cost. By reducing the complexity, fewer clock cycles are required for processing, and power consumption is also reduced.
There are several digital audio output sampling rates that are standard in the industry. The standard digital audio output sampling rates include 32 KHz, 44.1 KHz, and 48 KHz. After decoding any signal component of a composite audio signal down to a common, single sampling rate, it is desirable to be able to output the signal component at any of the three sampling rates described above.
Traditionally, a design to convert from a single sampling rate to any of multiple sampling rates would require multiple sampling rate conversion schemes, one to handle each desired standard output sampling rate. As a result, duplication of hardware and additional cost and power consumption would be incurred. An efficient implementation to convert from a single sampling rate to any of the standard sampling rates is desired.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with embodiments of the present invention as set forth in the remainder of the present application with reference to the drawings.
A need exists for an approach to perform efficient sampling rate conversion in a multi-channel audio signal decoding system by reducing the complexity of the hardware required, therefore reducing cost and power consumption.